33 research outputs found

    Object-based Control/Data-flow Analysis

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    Not only does a clear distinction between control and data flow enhance the readability of models, but it also allows different tools to operate on the two distinct parts of the model. This paper shows how the modelling based on control/data-flow analysis can benefit from an object-based approach. We have developed a translation mechanism that is faithful and gives an extra dimension (hierarchy) to the existing paradigm of control and data flow interacting in a model. Our methodology provides a comprehensible separation of these two parts, which can be used to feed another analysis or synthesis tools, while still being able to reason about both parts through formal methods of verification

    The Ecce and Logen Partial Evaluators and their Web Interfaces

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    We present Ecce and Logen, two partial evaluators for Prolog using the online and offline approach respectively. We briefly present the foundations of these tools and discuss various applications. We also present new implementations of these tools, carried out in Ciao Prolog. In addition to a command-line interface new user-friendly web interfaces were developed. These enable non-expert users to specialise logic programs using a web browser, without the need for a local installation

    A High Dynamic Range ASIC for Time of Flight PET with monolithic crystals

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    The HRFlexToT is a 16-channel ASIC for SiPM anode readout designed for Positron Emission Tomography (PET) applications that features high dynamic range (>8 bits), low input impedance, common cathode connection, high speed and low power (~3.5 mW/ch). The ASIC has been manufactured using XFAB 0.18 mm CMOS technology. The main characteristics of the HRFlexToT, compared to its predecessor, are a new energy measurement readout providing a linear Time Over Threshold (ToT) with an extended dynamic range, lower power consumption and better timing response. Initial measurements show a linearity error below 3%. Single Photon Time Resolution (SPTR) measurements performed using a Hamamatsu MPPC S13360-3050CS (3x3 mm2 pixel, 50 umm cell) shows 30% improvement with respect to the previous version of the ASIC, setting this specification in the order of 141 ps FWHM and reducing 3 times power consumption. It is important to highlight that an SPTR of 141 ps FWHM is, according to the best of our knowledge, the best resolution achieved so far for this sensor. Coincidence Time Resolution (CTR) measurements are expected to be performed during 2018

    Improving Compositional Verification of State-based Models by Reducing Modular Unbalance

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    Compositional Verification is a viable way to tackle the state explosion problem. However, the decomposition of a system into smaller parts is not a trivial problem, and dividing the specification into modules can be regarded as one of the main issues that concerns a compositional approach. This paper concentrates on the application of compositional verification to state-based models, in order to reduce the number of nodes assigned to memory, thus avoiding state explosion and speeding up the verification. Furthermore, we investigate and propose an estimation method that improves the compositional verification process in modular designs, such that the amount of memory required by the process is minimised. This method has been applied to a real-life embedded system, producing meaningful results without the need of data abstraction

    Modelling and Verification of Embedded Systems based on Petri Net oriented Representations

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    Driven by the demand for more functionality, the complexity involved in the design of embedded systems continues to increase. This has lead to a progressive increase in the amount of control and data flow that current embedded systems need to deal with. This dissertation addresses the interaction between these two domains and investigates its influence on the design of embedded systems, in terms of overall design cost. The first part of this dissertation presents the formalisation of a new design representation, called Dual Flow Net (DFN), which provides a tight control and data flow interaction. This is achieved by means of two new concepts. Firstly, the structure of the new DFN model is formulated employing a tripartite graph, as opposed to previous approaches based on a bipartite graph. Such a structure allows the use of a unique semantics to model the control flow, data flow, and its interactions. Secondly, a marking scheme that captures the changes in the state of the system produced by the separated effects of control and data flow is described. The analysis of behavioural properties using such a marking is proposed, and illustrative examples are given. The second part of this dissertation is concerned with the verification of DFN models through formal methods. A new set of algorithms for the symbolic model checking of DFN models is proposed. Behavioural properties of embedded systems, such as reachability, safety and liveness, are verified, using both Computation Tree Logic (CTL) and Linear Temporal Logic (LTL) formulae. The description of a new estimation method is provided, which is capable of allocating resources to the verification process efficiently, hence dealing with the state explosion problem. The algorithms and estimation method have been validated by examples of varying complexity, ranging from simple systems, in order to understand the modelling and verification principles, up to complex arrangements that depict real-life embedded systems, including an Ethernet coprocessor. The final part of this dissertation investigates the applicability of DFN models to the co-synthesis of hardware/software systems, as a potential application of the new design representation. It has been shown how the DFN model provides a flexible design framework for system-level trade-offs in the generated solution

    Dual Transitions Petri Net based Modelling Technique for Embedded Systems Specification

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    This paper presents a new modelling technique capable of modelling both control and data information using a single unified approach. This is achieved by modifying the classical Petri Net structure, allowing it to have two types of transitions and arcs. As a consequence, loops and conditional operations within complex specifications are easily identified. The system dynamic behaviour is modelled using a new marking scheme of the net consisting of a new element called "value" for data representation in addition to classical tokens used for control purpose. Structural definitions, behavioural rules and graphical representation of the new modelling technique are given. One potential application of the proposed modelling technique is the internal representation of embedded systems specification. Two examples are included illustrating the applicability and efficiency of the proposed modelling technique
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